02

Dec' 2023
General

SiliconTech organizes a workshop on ‘Nanotechnology and Embedded Systems’ (NES 2023)

The Department of EE (Electronics Engineering) at SiliconTech collaborated with the industry partner Sevya Multimedia to conduct a three-day workshop on Nanotechnology and Embedded Systems (NES 2023) from 30 November to 2 December 2023 in the hybrid mode.

The objective of NES 2023 was to create awareness of the recent advances in solid-state devices, VLSI circuits, and embedded systems. The workshop comprised of expert talks and hands-on training sessions by eminent speakers from leading semiconductor companies. The primary aim was to enable the participants to enhance their skills and network with the leading semiconductor companies to pursue their careers in VLSI and embedded systems.

The chief guest of the workshop was Dr. Ajit Panda, Director of VVDN Technologies and the Guest of Honor was Mr. Mrinal Das, Head of Hardware Design Group (R&D) at Synopsys.

The first talk of the day was delivered by Mr. Vinayak Agarwal, Principal Engineer at Intel Corp. Mr. Agarwal gave a detailed explanation of the semiconductor industry covering its history, the ubiquitous nature of Moore’s law, and the future of the industry. The second talk was delivered by Mr. Atul Bhargava, Principal Engineer at ST Microelectronics on the evolution of design techniques and challenges. The first day of the workshop concluded with a panel discussion on ‘Skilling our Next Generation Engineers’ where Dr. Shivananda Koteshwar, Mr. Atul Bhargava, Mr. Vinayak Agrawal, Mr. Puneet Mittal, Mr. Narasayya Donepudi and Mr. Abhisek Jain shared their views on challenges of skilling young engineers and addressed numerous questions from the participants.

The second day started with an enlightening talk on the era of SysMoore delivered by Dr. Shivananda Koteshwar, EDA Group Leader and Site Head at Synopsys. In his talk, he explained how Synopsys is solving the problem of industry growth with Moore’s law.  It was followed by another talk on radiation effects on electronic circuits delivered by Mr. Abhisek Jain, Group Manager at ST Microelectronics. The next session was hands-on and it was jointly conducted by Mr. Puneet Mittal, Founder of VLSI Experts, and Mr. Rajat Bansal, Lead Design Engineer at NXP. The session included a demo of an entire digital IC design flow.

The last day of the event featured a talk on entrepreneurship by Mr. Rashmiranjan Mohapatra, Group Director EDAG and Site Head at Synopsys. The talk reflected Mr. Mohapatra’s extensive experience with multiple successful startups in Bhubaneswar. It was followed by another talk on the design flow of an IoT product by Mr. Bikash Kund, CEO of Asiczenon where he narrated his experience in designing successful IoT products for more than a decade now. The last session was a hands-on training conducted by Mr. Kunal Ghosh, Founder of VLSI System Design (VSD). He explained about VLSI chip designing in the session.

A total of six hundred and forty seven participants, including students, research scholars, faculty members, and industry experts attended the workshop enthusiastically to enrich their knowledge of Nanotechnology and Embedded Systems.