Sep' 2019

Sub-nanoamp Programmable Current Reference Design in 28nm CMOS Technology

Researchers at SiliconTech’s Advanced VLSI Lab are developing various analog IP blocks for an ultra-efficient neuromorphic processor in 28-nanometer CMOS technology.

Various analog and mixed-signal blocks require a programmable current reference down to sub-nanoamp of current, which is extremely challenging in this technology.

Major design efforts in this project are:

  • The architecture of a temperature-independent voltage and current reference circuit.
  • Design of the voltage and current reference circuits using enterprise Computer Aided Design (CAD) tools.
  • Layout and verification (DRC/LVS/QRC) of all the designed blocks in the 28nm CMOS technology.